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Coding & systems
Low Latency
Cache-friendly C++, hot paths, nanoseconds
Overview
About low latency questions in quant interviews
C++ patterns asked at HFT desks: cache-friendly layouts, branch-prediction-aware code, and the hot-path optimisations that separate quant-dev offers from rejections.
How to study this topic
A path that works
- 1
Start with the easy set
Warm up with the 8 easy low latency questions. Quick wins build pattern recognition before complexity ramps.
- 2
Drill the medium tier next
15 medium questions sit in the sweet spot where most interview questions cluster. Time yourself, then redo any you missed two days later.
- 3
Stress-test on hard problems
11 hard questions simulate the on-site round. Skip looking at solutions for at least 20 minutes, then write up your approach.
The library
All 34 low latency questions
easySoftware Prefetch for Sequential Price Array ScaneasyRDTSC Cycle CountereasyBranch-Free Min/MaxeasyCircular Buffer LoggingeasyTimespec Elapsed Nanoseconds (clock_gettime Arithmetic Pattern)easyZero Copy Binary Parsing with SpaneasyCompiler Barrier FenceeasyForce-Inline and No-Inline Tick Rounding (__attribute__ Annotation)mediumFlat Array Symbol Table: O(1) Metadata LookupmediumPage Warmup via Sequential Touch (Huge Page Pre-fault Pattern)mediumFixed-Point Price Arithmetic (FixedPoint<4> with Integer Backend)mediumHot/Cold Data Splitting for Cache-Efficient Trade StructmediumBranchless Absolute Value via Arithmetic Shiftmedium4x Loop-Unrolled Exponential Moving AveragemediumCRC32 Packet Checksum (Scalar Equivalent of SSE4.2 _mm_crc32_u8)medium__restrict__ Pointer Alias Hint for Vectorized Price UpdatemediumSIMD Batch FX Price ConversionmediumRisk Group NettingmediumCache-Oblivious Recursive Matrix Transpose for Correlation MatricesmediumComputed Goto Message Dispatch (GCC Label Address Extension)mediumLow-Latency Timer HeapmediumHorizontal Sum of Portfolio Positions (Scalar Equivalent of SIMD hadd)mediumMarket Data LRU CachehardO(1) Order Cancel with Doubly-Linked List and Hash MaphardJSON Delimiter Scanner (Scalar Equivalent of simdjson SIMD Byte Search)hardSIMD-Accelerated Order Price FilterhardDynamic SIMD-Optimized BitsethardTemplate-Inlined Strategy Dispatch (Zero Virtual Overhead)hardBranchless Order Router: 4-Venue TournamenthardLock-Free SPSC Ring BufferhardLock-Free Append-Only Timestamp Log (Atomic Fetch-Add Slot Allocation)hardCache-Friendly B+ TreehardSpeculative Execution Fence for Sequence-Number Guard (lfence / Spectre Mitigation)hardSimplified TCP State Machine (Kernel-Bypass Connection Lifecycle)
View all 34 low latency questionsRelated topics